Flash memories have become increasingly popular in recent years. A typical flash memory includes a memory array having a large number of memory cells arranged as an array. Each of the memory cells may be fabricated as a field-effect transistor having a control gate (CG) and a floating gate (FG). The floating gate is capable of holding charges, and is separated from source and drain regions contained in a substrate by a layer of thin oxide. Each of the memory cells may be electrically charged by injecting electrons from the substrate into the floating gate. The charges may be removed from the floating gate by tunneling the electrons to the source region or an erase gate during an erase operation. The data in flash memory cells may thus be determined by the presence or absence of charges in the floating gates.
As the semiconductor industry introduces new generations of integrated circuits (ICs) having higher performance and greater functionality, cost reduction pressure becomes stronger. In particular, reducing a number of operations, such as lithography operations, has become desirable.